The present invention relates generally to buffer circuits, and more specifically to low power buffer circuits.
A prior-art inverting buffer is shown in FIG. 1. Buffer 100 includes transistors 102 and 104. The buffer drives voltage VOUT on node 108 across load capacitor 110 to high and low values depending on voltage VIN on node 106. The capacitance value of capacitor 110 is shown as C. Voltage waveforms during the operation of buffer 100 are shown in FIG. 2. At time t1 input voltage VIN goes high and output voltage VOUT goes low. At time t2 VIN goes low and VOUT goes high. For two transitions of VOUT there are two transitions of VIN.
If EBUF represents the energy dissipated in buffer 100 when C=0, then when C greater than 0, the total dissipated energy for two transitions at VOUT is given by:
ETOT=EBUF+ELOAD, ELOAD=C*(VCCxe2x88x92VSS)2xe2x80x83xe2x80x83(1)
Buffer energy EBUF has only a small dependence on the value of C. Even if a very small and very slow buffer was used, so that EBUF approaches zero, the total energy ETOT would always be larger than ELOAD. The energy values can be normalized to load energy as follows:                                           E            TOT                                E            LOAD                          =                                                            E                BUF                                            E                LOAD                                      +            1                    ≥          1                                    (        2        )            
Equation 2 shows that for a resistive buffer governed by equation 1, the normalized energy cannot decrease below one.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternate buffer circuits.